Amplifier circuits are used in a variety of electronic systems for increasing the voltage, current, or power of a signal. A “differential” amplifier is a well-known type of amplifier circuit, which provides an output signal that is proportional to the difference between two input signals. An ideal differential amplifier is designed to amplify the difference between the two input signals while rejecting any signal element that is common to the two input signals.
Many types of electronic circuits, particularly for portable or mobile applications, use low operating voltages to increase battery life, reduce product weight, and enable use of denser integrated circuits. This is particularly advantageous in portable electronic devices. Lower voltages, however, may impose limits on circuit operation. For example, reducing circuit supply voltages also reduces the range of circuit signal voltages at which an amplifier or the like may operate.
The circuit of FIG. 8 is a differential input stage of an amplifier circuit. The purpose of the circuit is to sense a voltage difference VID across its inputs, and to accurately reproduce that voltage across a resistor R1. The resulting current flow in R1 (which is VID divided by R1 by Ohm's Law) can be conveyed, through the metal oxide semiconductor (MOS) transistors M1 and M2, as an accurate signal in the form of a current, for further use in load 1 and/or load 2. The circuit uses two high DC gain type operational amplifiers A1, A2 and two transistors M1, M2, interconnected in negative feedback loops. Each operational amplifier is itself a differential amplifier for amplifying the difference between the signal input at the non-inverting input of the amplifier and the respective feedback signal at the inverting input.
A typical application may utilize the illustrated circuit as a transconductance amplifier serving as the input stage of voltage amplifier circuitry. The input stage elements provide proportional currents to additional circuitry, connected as the loads. In such an application, the additional circuitry represented by the loads provides gain and current conversion to an amplified voltage output node not shown. The amplifier input stage circuit shown in detail in FIG. 8, however, has limitations.
Referring now to FIG. 8 in more detail, consider initially an idle or equilibrium state where the input voltage difference, VID, is 0, because the two input voltages VINP, VINN are identical. Each of the two operational amplifiers A1, A2 forms a local negative feedback loop with a transistor, M1 or M2, respectively. As long as the operational amplifiers have high DC gain, and all components are functioning normally, the negative feedback loops force the nodes VSP, VSN to attain values equal to VINP, VINN, respectively. This is the “virtual-short-circuit” principle of operational amplifiers, that is to say, the feedback drives the inputs of an operational amplifier toward the same potential.
If VINP, VINN differ in value by a nonzero value VID, the local feedback loops will continue, separately, to adjust to maintain each operational amplifier's inputs at the same potential. Consequently voltage V1 across R1 will tend to equal VID, if all components function as intended. The two constant current sources I1 and I2 (with identical values) deliver fixed currents, and the operational amplifiers have high input resistances (assumed infinite for ease of explanation). Therefore, any current that flows in R1 must flow also through the transistors M1, M2 and appear as a difference in the drain currents of those transistors. This current will flow to subsequent circuitry (drawn abstractly as “loads”) connected to the drains of the transistors M1, M2.
A limitation of the circuit of FIG. 8 becomes apparent when the input voltages VINP, VINN approach the level of the negative power-supply voltage V−. Upon this condition, the negative feedback loops around operational amplifiers A1 and A2 tend to force VSP, VSN toward the negative supply voltage V−. However, each of the transistors M1 and M2 needs at least some minimum voltage from its source to its drain, to function normally. Also, an added voltage drop of the load circuitry appears at the drain terminals of the transistors M1, M2, further reducing the available voltage range for the source-to-drain voltages of the transistors. Transistors require some nonzero voltage between gate and source (VGS), a further constraint on the useful negative range of VSP, VSN, even if the outputs of the operational amplifiers can swing to the negative supply voltage. These factors limit the practical input voltage range at VINP, VINN to some value more positive than V−. This can be a relatively severe operational constraint in many applications, particularly those using relatively low magnitude power supply voltages.
A need exists for an effective technique to extend the operational range of the input voltage of a differential amplifier stage, e.g. for use as a transconductance input stage of an amplifier circuit.
The inventor has considered solutions to this constraint, that have proved insufficient. For example, the inventor has considered extending the input range of the circuit of FIG. 8 to the negative supply voltage by shifting VINP and VINN together. FIG. 3 shows a conceptual version of this approach, using identical level-shifting fixed voltage sources of value VSHIFT. These voltage sources have other possible placements, but FIG. 3 is illustrative. The voltage sources VSHIFT in FIG. 3 are symbolic of the offset voltage function performed, and do not represent physical components. Examples of possible circuit components are discussed, later, with regard to FIGS. 5 to 7.
The feedback loops as before force the voltages on opposite ends of the resistor R1 to values corresponding to voltages at the inputs of the operational amplifiers A1, A2. However, these voltages now include the offset voltage VSHIFT. The offset can be chosen to provide necessary operational ranges across the respective transistors, even when the input signals approach the level of the negative supply voltage. Problems arise, however, with the considered circuit of FIG. 3, due to finite transistor output resistances associated with MOS transistors.
FIG. 4(a) represents an MOS transistor as may be used as an input transistor within operational amplifier A1 or A2, or for the transistors M1, M2. The drain current of any MOS transistor depends partly on its drain-to-source voltage VDS, even when the transistor is biased for high output impedance (with a “saturated” or “pinched-off” channel), as is usual in amplifier circuits. This dependence can be modeled equivalently as an ideal transistor plus a parallel incremental or small-signal conductance, labeled ro in the illustration of FIG. 4(b) (this is a standard analytical technique).
The exemplary circuit shown in FIG. 5 implements the hypothetical technique outlined above relative to FIG. 3, using P-channel MOS transistors M11, M12 as “source followers” to provide the voltage offsets. The transistors M11, M12 have isolated “well” or back-gate connections tied to their sources, which eliminates a complication otherwise referred to as the “body effect.” In principle, M11 and M12 exhibit constant voltage VGS between gate and source because of constant drain currents, regardless of the voltage swing at the gates. This accomplishes a common voltage shift of the positive (+) input VINP and the negative (−) input VINN, as shown at VSHIFT in FIG. 3.
However, a problem tends to arise within this hypothetical technique. As VID swings, M11 and M12 experience varying drain-to-source voltage VDS. This VDS variation, through ro, changes the VGS voltage that is required to pass the current from each constant-current source. This effect appears as a DC gain error from VID to V1, and it introduces nonlinearity in the signal path because the ro effect is not a true linear resistance. These can be dominant error sources for voltage amplification implementing the circuit described.
Transistors M1 and M2 also exhibit a finite ro, but there the finite ro affects the signal path much less than with M11 and M12. Finite ro in the M1, M2 transistors changes the value of gate-to-source voltage VGS needed to induce the drain current in each transistor, but the gate-to-source voltage VGS of each transistor M1 or M2 is driven by a high-gain operational amplifier A1 or A2. The operational amplifier “absorbs” any VGS error at M1 or M2 by shifting its output voltage. The equivalent change at inputs VINP and VINN consists of this output shift divided by the large voltage gain of the operational amplifiers. In contrast, the transistors M11, M12 in the circuit of FIG. 5 have gate-to-source voltage drops VGS, which are added directly to the input voltages. Errors from finite ro in MOS transistors M11, M12 add to the input signal voltage VID, and these gate-to-source voltage drops are not reduced by any amplifier gain.
Another hypothetical approach to building a circuit to implement the voltage offset strategy of FIG. 3 considered by the inventor, is to build the level-shift voltages into the operational amplifiers themselves. This approach exhibits problems similar to those found in the circuit of FIG. 5.
Consider now two practical approaches to build operational amplifiers with such hypothetical level shifting (that is, with large deliberate input offset voltage) built into input circuitry of the op-amps. The first approach introduces a voltage drop in series with the VGS path of one of the input transistors, within the operational amplifier itself. The other approach induces a mismatch between the input transistors, within the operational amplifier. FIG. 6 illustrates a voltage drop VBIAS in series with the VGS path of one of the input transistors of the operational amplifier, and FIG. 7 depicts a mismatch of input transistors within the operational amplifier. Both these techniques, however, tried to introduce errors that are dependent on the ro impedance characteristic of one or more of the transistors within the operational amplifier.
Considering now FIG. 6 in more detail, depicted is an example of an operational amplifier circuit, such as might be used as the amplifier A1. A current-carrying diode D1 interposes a voltage difference or drop between the source terminals of two input transistors M13, M14 of the operational amplifier. Note also components R19, R20, Q15, Q16 which are typical in such an operational amplifier; these components of the amplifier sense the current difference between the currents flowing from M13 and M14, while maintaining the drain terminals of M13 and M14 at similar potentials.
The circuitry of FIG. 6 can be used to produce an operational amplifier that will exhibit a voltage difference between its two inputs when a negative feedback loop is closed around it with high gain (a feedback path is omitted from this drawing). This voltage difference ideally equals the voltage drop across diode D1 when conducting. The operational amplifier in FIG. 6 corresponds to one of the operational amplifiers, together with its input shift-voltage source, shown in FIG. 3.
However, the amplifier of FIG. 6 operates input transistor devices M13, M14 at different VDS voltages, because the drains are at the same potential but the sources are not. As the two input voltages of the operational amplifier move in common, even with a fixed difference between them (for example, under excursions of VID in FIG. 3), the VDS voltages of M13 and M14 will vary. These variations alter the VGS voltage of each transistor, as in the circuit of FIG. 5, and the effect is not linear. Similar to the circuit of FIG. 5, this causes error in the path from VID to V1, which is undesirable.
FIG. 7 shows a fragment of another operational amplifier, in which the input transistors M21, M22 are deliberately mismatched to create an input offset without adding a diode or other explicit voltage drop. The mismatch may, for example, use a difference in MOS width/length dimensions, or different threshold-implant doping, or different transistor types, such as mixing bipolar and MOS transistors. All of these hypothetical methods, however, lead to different ro characteristics in M21 and M22. The magnitude, or the VDS dependence of both MOS transistors M2, and M22, of the ro effects in the two transistors, will differ. This leads again to errors as the two input terminals move in unison and therefore M21, M22 experience varying VDS voltages.
As shown by the preceding discussion, simple voltage shift techniques for providing a shift on one input of each operational amplifier, considered by the inventor, may help somewhat to extend the range of the transconductance stage. However, such techniques introduce undesirable non-linear performance, and may also disadvantageously reduce common mode rejection. Hence, a need still exists for a technique to extend the operational range of the input voltage of a differential amplifier or stage, while avoiding problems such as noted above.